Radiation Tolerant Digital ASIC Design for Scientific Detectors

by Sandeep Miryala (BNL)

Wednesday 14 Apr 2021, 11:00 → 12:00 US/Pacific

zoom

Join by zoom:  https://lbnl.zoom.us/j/92821146323

Abstract: Application Specific Integrated Circuits (ASICs)  designed for the HEP applications encompasses significant digital logic.  Digital implementation is based on semi-custom design flow using standard cell libraries. The harsh radiation environment poses a serious threat to the performance and functionality of these digital standard cells.  To mitigate effects such as Total Ionizing Dose (TID) and Single Event Effects (SEEs)  on digital designs there is a need for the rad-hard digital design flow. Such a design flow has been successfully used for the RD53 collaboration developed chips for the ATLAS and CMS inner tracker pixel upgrades. The TMR implementation approach could be interesting to the FPGA designers and may be adopted to the FPGA based designs. This seminar talks of an overview of rad-hard digital ASIC design based on semi-custom digital design flow.